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Memristor-based voltage-controlled relaxation oscillators

This paper introduces two voltage-controlled memristor-based reactance-less oscillators with analytical and circuit simulations. Two different topologies which are R-M and M-R are discussed as a function of the reference voltage where the generalized formulas of the oscillation frequency and conditions for oscillation for each topology are derived. The effect of the reference voltage on the

Circuit Theory and Applications

Dynamic modelling of impact of lean policies on production levelling feasibility

A dynamic systems approach is proposed to investigate challenges of implementing production levelling and associated costs. A model of a lean cell is developed using system dynamics. The model captures various lean tools influencing production levelling. Comparative cost analysis between various levelling implementation policies for stochastic demand with multiple products is conducted. Results

The quest for user similarity in mobile societies

In this paper we explore the notion of mobile users' similarity as a key enabler of innovative applications hinging on opportunistic mobile encounters. In particular, we analyze the performance of known similarity metrics, applicable to our problem domain, as well as propose a novel temporal-based metric, in an attempt to quantify the inherently qualitative notion of similarity. Towards this

Software and Communications

The deterministic multicast capacity of 4-node relay networks

In this paper, we completely characterize the deterministic capacity region of a four-node relay network with no direct links between the nodes, where each node communicates with the three other nodes via a relay. Towards this end, we develop an upper bound on the deterministic capacity region, based on the notion of a one-sided genie. To establish achievability, we use the detour schemes that

Software and Communications
Agriculture and Crops

Optimal random access for a cognitive radio terminal with energy harvesting capability

We consider a cognitive radio scenario with an energy harvesting secondary user (SU) attempting to access a primary channel randomly. We assume multipacket reception (MPR) capability and investigate a system in which the SU may or may not exploit the primary feedback messages. The access probabilities are obtained to maximize the secondary throughput under the constraints of primary queue

Software and Communications
Agriculture and Crops

Optimization of fractional-order RLC filters

This paper introduces some generalized fundamentals for fractional-order RL β C α circuits as well as a gradient-based optimization technique in the frequency domain. One of the main advantages of the fractional-order design is that it increases the flexibility and degrees of freedom by means of the fractional parameters, which provide new fundamentals and can be used for better interpretation or

Circuit Theory and Applications
Software and Communications
Mechanical Design

Fibonacci-based hardware post-processing for non-autonomous signum hyperchaotic system

This paper presents a hardware implementation of a robust non-autonomous hyperchaotic-based PRNG driven by a 256-bit LFSR. The original chaotic output is post-processed using a novel technique based on the Fibonacci series, bitwise XOR, rotation, and feedback. The proposed post-processing technique preserves the throughput of the system and enhances the randomness in the output which is verified

Circuit Theory and Applications
Software and Communications

Parametric control on fractional-order response for Lü chaotic system

This paper discusses the influence of the fractional order parameter on conventional chaotic systems. These fractional-order parameters increase the system degree of freedom allowing it to enter new domains and thus it can be used as a control for such dynamical systems. This paper investigates the behaviour of the equally-fractional-order Lü chaotic system when changing the fractional-order

Circuit Theory and Applications

Accurate timing analysis of combinational logic cells engine using adaptive technique based on current source model

As the usage of very large scale integration (VLSI) in computers continues to increase, debugging of timing problems on actual hardware becomes more and more difficult. The post-layout gate-level simulation constitutes a critical design step for timing closure. The major drawback of traditional post-layout gate-level simulation is its long analysis time, which increases as design complexity

Circuit Theory and Applications

On some generalized discrete logistic maps

Recently, conventional logistic maps have been used in different vital applications like modeling and security. However, unfortunately the conventional logistic maps can tolerate only one changeable parameter. In this paper, three different generalized logistic maps are introduced with arbitrary powers which can be reduced to the conventional logistic map. The added parameter (arbitrary power)

Circuit Theory and Applications