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Hermite polynomials in the fractional order domain suitable for special filters design

Due to the importance of its integer order counterpart in many mathematical and engineering fields, the fractional order Hermite polynomials are studied in this paper. A fractional variation of the well known Hermite differential equation is introduced based on Caputo fractional operator. The proposed equation is solved using fractional Taylor power series method and the convergence is verified

Circuit Theory and Applications

Memristor-based pulse width modulator circuit

This paper discusses the use of the memristor in one of the most important modulation techniques in communication field namely the pulse-width modulation. A fundamental two designs for memristor-based lead and trail PWM are discussed with mathematical analysis and PSPICE simulation results which show a great matching with the analytical formulation. Moreover, a third design which combine those two

Circuit Theory and Applications

Symmetric encryption algorithms using chaotic and non-chaotic generators: A review

This paper summarizes the symmetric image encryption results of 27 different algorithms, which include substitution-only, permutation-only or both phases. The cores of these algorithms are based on several discrete chaotic maps (Arnold's cat map and a combination of three generalized maps), one continuous chaotic system (Lorenz) and two non-chaotic generators (fractals and chess-based algorithms)

Circuit Theory and Applications

Memristor-based data converter circuits

This paper introduces data converter circuit based on memristors. A proposed Digital to Analog Converter (DAC) circuit based on non-overlapped input signals, which is suitable for common source connected transistors. Analytical formulas are introduced to relate the digital input with the analog output including the transistors dimension. In addition, PSpice simulations are performed to validate

Circuit Theory and Applications

Protocol design and stability analysis of cooperative cognitive radio users

A single cognitive radio transmitter-receiver pair shares the spectrum with two primary users communicating with their respective receivers. Each primary user has a local traffic queue, whereas the cognitive user has three queues; one storing its own traffic while the other two are relaying queues used to store primary relayed packets admitted from the two primary users. A new cooperative

Software and Communications

RF energy harvesting in wireless networks with HARQ

In this paper, we consider a class of wireless powered communication networks using data link layer hybrid automatic repeat request (HARQ) protocol to ensure reliable communications. In particular, we analyze the trade-off between accumulating mutual information and accumulating RF energy at the receiver of a point-to-point link using HARQ with incremental redundancy over a Rayleigh fading channel

Software and Communications

Investigation of properties limiting efficiency in Cu2ZnSnSe4-based solar cells

We have investigated different nonidealities in Cu2ZnSnSe4-CdS-ZnO solar cells with 9.7% conversion efficiency, in order to determine what is limiting the efficiency of these devices. Several nonidealities could be observed. A barrier of about 300 meV is present for electron flow at the absorber-buffer heterojunction leading to a strong crossover behavior between dark and illuminated current

Energy and Water
Circuit Theory and Applications
Software and Communications

Memristor-based redundant binary adder

This paper introduces a memristor based redundant binary adder for canonic signed digit code, that coding eliminates the carry and provides a carry-free addition. The proposed binary adder circuit tries to achieve high addition speed that is independent on the length of the data using the accumulation property of a Nano-element called a memristor. The general block diagram of the proposed circuit

Circuit Theory and Applications

Memristor based N-bits redundant binary adder

This paper introduces a memristor based N-bits redundant binary adder architecture for canonic signed digit code CSDC as a step towards memristor based multilevel ALU. New possible solutions for multi-level logic designs can be established by utilizing the memristor dynamics as a basis in the circuit realization. The proposed memristor-based redundant binary adder circuit tries to achieve the

Circuit Theory and Applications

Multi-phase oscillator for higher-order PSK applications

Multi-phase oscillator is an essential block in digital communication systems especially phase shift keying PSK based systems. In this paper, a procedure for designing a multi-phase oscillator with any required phase shift is proposed, unlike the previous oscillator which generates equal phase shifts. This oscillator circuit is built using fractional-order elements to generate any distribution of

Circuit Theory and Applications
Software and Communications