arch2.jpg

Computer Architecture

This course introduces the basic hardware structure of a programmable computer and the basic laws underlying performance evaluation, The student learns how to design the control and data path hardware for a processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems, The principles presented in lecture are reinforced in the laboratory through design and simulation of a register transfer (RT) implementations in Verilog.

Course ID
ECE 345
Level
Undergraduate
Credit Hours
CH:3