Breadcrumb
Towards evolving sensor actor networks
Sensor Actor NETworks (SANET) represent a major component of ubiquitous service environments promising interesting solutions to a wide range of problems. Despite the obvious increase in the research activities proposing architectures and protocols for SANETs, we are still no where near the production of industrial-grade SANET software that can be relied upon for mission critical applications. The cost of programming, deploying and maintaining SANET environments is still highly prohibitive due to the lack of industrial tools capable of realizing adaptive SANET software in a cost effective way
Aggrandize efficiency of ultra-thin silicon solar cell via topical clustering of silver nanoparticles
A highly efficient photovoltaic nanocomposite device is demonstrated by fabrication of structural clusters of silver nanoparticles (Ag NPs) on silicon solar cells via a boil deposition method. The efficiency of silicon solar cell was augmented by coating Ag NPs ultra-thin-film deposition on silicon solar cell. Chemically synthesized silver NP's, their consumption on a silicon thin layer and the operation of photovoltaic nanocomposite device were characterized by using several electron probe microscopic pectroscopic and spectrometric techniques viz. x-ray diffraction (XRD), scanning electron
Study of Energy Harvesters for Wearable Devices
Energy harvesting was and still an important point of research. Batteries have been utilized for a long time, but they are now not compatible with the downsizing of technology. Also, their need to be recharged and changed periodically is not very desirable, therefore over the years energy harvesting from the environment and the human body have been investigated. Three energy harvesting methods which are the Piezoelectric energy harvesters, the Enzymatic Biofuel cells, and Triboelectric nanogenerators (TENGs) are being discussed in the paper. Although Biofuel cells have been investigated for a
Study of fractional flux-controlled memristor emulator connections
In this paper, the series and parallel connections of the fractional flux-controlled memristors are studied. Asymmetric I-V hysteresis with high I-V nonlinearity can be obtained from single fractional memristor as reported in literature. However, connecting different memristor emulators can convert the asymmetric hysteresis to symmetric one and maintaining the high I-V nonlinearity to be used in some memristor devices. The proposed circuits have been analyzed mathematically to study the effect of changing the frequency and fractional power. Different cases have been verified on PSpice using
Stochastic modeling of mushroom—waveguide photodetectors
Waveguide photodetectors (WGPDs) are one of the promising candidates to solve the tradeoff between the quantum efficiency and the transit time in the surface illuminated photodiodes where the lightwave is incident laterally perpendicular to the direction of the flow of generated carriers, enhancing both high speed and quantum efficiency. In Mushroom-WGPDs, the performance degradation due its parasitic capacitance and the load resistance is overcome due to the mesa mushroom structure. Inaccuracies in the dimensions of’Mushroom-WGPDs due to the fabrication affect its functionality and its
Multiple Pinch-Off Points in Memristive Equations: Analysis and Experiments
Pinched hysteresis behavior is considered evidence of the existence of the memristive element. Recently, the multi-lobes (more than two) behavior has been discovered in some memristive devices. In this paper, a fractional-order flux/voltage-controlled memristive model is introduced that is able to develop multiple symmetric and asymmetric pinch-off points. Generalized closed-form expressions for the necessary conditions of multiple pinch-off points existence are derived in addition to the coordinates of the pinch-off points in the I-V plane. Closed-form expressions for the minimum and maximum
Supercapacitor reciprocity and response to linear current and voltage ramps
The focus in supercapacitor research typically falls into one of two categories: (i) the rational design and engineering of electrode materials and electrolyte formulation to achieve high performance devices at competitive costs, and (ii) the modeling of their resulting behavior in response to constant-current charging/discharging, cyclic voltammetry or impedance spectroscopy. However, less work has been dedicated to new ways for charging these devices. In this work we show that charging a supercapacitor, modeled as a constant phase element with a series resistor, using a linear voltage ramp
N-digits ternary carry lookahead adder design
Carry lookahead adders (CLAs) are extensively used in digital circuits due to their logarithmic computational time (O(log n)) compared to linear computational time(O(n)) in the ripple carry adders. In this paper, two design approaches for N-digits ternary logic CLA based on K-map and threshold logic methods are proposed in addtion to their realization using CNTFETs only and memristor with CNTFETs. Finally, 4-bit ternary CLA is presented. A comparison and tradeoffs among the proposed designs are presented in terms of the delay and the area. The comparison shows that the transistor-only-based
Supercapacitor discharge under constant resistance, constant current and constant power loads
Supercapacitors, which are now widely used as power sources in various applications, are discharged with one of the following three basic discharge modes: a constant current load, a constant resistance load or a constant power load. A constant current load is one which varies its internal resistance to achieve a constant current regardless of the applied voltage. For the constant resistance case, it results in a change of power as the voltage level changes. And for a constant power load, the load varies its impedance as the input voltage changes in order to keep the power constant. However
Multiplierless chaotic Pseudo random number generators
This paper presents a multiplierless based FPGA implementation for six different chaotic Pseudo Random Number Generators (PRNGs) that are based on: Chua, modified Lorenz, modified Rössler, Frequency Dependent Negative Resistor (FDNR) oscillator, and other two systems that are modelled using the simple jerk equation. These chosen systems can be employed in high speed applications because they don't utilize any hardware multiplier. The proposed PRNGs have been implemented using VHDL, synthesized on Xilinx, using the FPGA: XC5VLX50T, and tested using the NIST statistical suite. Furthermore, a
Pagination
- Previous page ‹‹
- Page 7
- Next page ››