Publications

Multi-level electronic systems offer speed and area simplicity, reducing the complexity of implementation and power dissipation. In this paper, a Hybrid ternary Full Adder (FA) is proposed using Conventional Complementary Metal Oxide Semiconductor (CCMOS), Double Pass-transistor Logic (DPL), and Pass Transistors (PT). The proposed FA is extended up to 64-bits to test scalability. To validate the

This paper presents a novel lossless image encryption algorithm based on edge detection and generalized chaotic maps for key generation. Generalized chaotic maps, including the fractional-order, the delayed, and the Double-Humped logistic maps, are used to design the pseudo-random number key generator. The generalization parameters add extra degrees of freedom to the system and increase the

Free space optical (FSO) communication channels are affected by fluctuations in irradiance due to atmospheric turbulence and pointing errors. Recently, a generalized statistical model knows as Málaga (M) was developed to describe irradiance fluctuations of the beam propagating through a turbulent medium. In this paper, an approximate finite-series probability density function (PDF) for composite M

Self-Phase Modulation (SPM) is a non-linear phenomenon relating to the self-induced phase shift encountered by the optical field during its transmission into the optical fiber. It is the most popular technique for generating an optical frequency comb (OFC) with different frequency spacing values. The SPM is regulated by many parameters such as fiber length, input optical power, and the non

Ternary logic has become a promising alternative to traditional binary logic due to low power consumption and reduced circuits such as interconnects and chip areas. The efficiency of the multiplier circuit can be much better using a ternary logic system. Carbon nanotube field-effect transistor (CNTFET) is a promising technology as it achieves more advantages than MOSFET due to its low off-current

Different generalized filters topologies are proposed in the fractional-order domain. Three voltage-mode topologies and one current-mode topology are used to realize several types of fractional-order filters by applying different admittances combinations. The proposed topologies are designed using a single second-generation current conveyor (CCII-) and two fractional-order capacitors, which add

Recently, pinched hysteresis has been found in the electrical modelling of regular plant tissues. Usually, the biological tissues are characterized in the frequency domain using bio-impedance analyzers without investigating the time domain, which would show the pinched hysteresis. In this paper, the current-voltage analysis of some of the widely known electrical bio-impedance models is studied

The paper proposes voltage-controlled first-and second-order memristor emulators. The emulators are designed using an operational-transconductance amplifier (OTA) and voltage multiplier blocks plus a fractional-order capacitor. The presented second-order emulator provides two pinched points controlled by order of the employed fractional-order capacitor. Numerical and PSPICE simulation results

The rapid growth of vehicle demand, such as information sharing, entertainment, and multimedia contents, overwhelms the back-haul network. Due to this nature of the network that suffers from high link disconnections and limited resources, it is challenging to develop a new strategy to satisfy users' requirements. Proactive caching is a useful technique to mitigate the load on core networks, and

In this paper, a resource partitioning scheme combined with a new multi-carrier optical modulation technique for indoor visible light communication (VLC) system is proposed. In VLC systems, the coverage area is divided into multiple atto-cells. In each atto-cell, multiple LED arrays are used as access points (APs) serving the assigned users. The coverage area of APs might be overlapped to avoid